Draft docs/spec/poplink-phy-if.md PHY interface spec skeleton #71

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opened 2026-05-25 19:41:03 -03:00 by navigator · 2 comments

navigator commented

2026-05-25 19:41:03 -03:00

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Goal

Create the PopLink PHY interface spec skeleton at docs/spec/poplink-phy-if.md, listed as Phase 1 PHY deliverable #2 in PLAN.md Section 13.4. The spec describes the PopLinkPHYIO Chisel bundle contract that decouples upper-layer fabric logic from the analog PHY implementation (academic open vs commercial IP vs partnership).

Sections to include:

Purpose and scope (decouple PHY from upper layers per Section 13.3)
Bundle signals (TODO table: tx_data, rx_data, tx_valid, rx_valid, lane_status, reset/init handshake, error flags, calibration controls)
Lane configuration (number of lanes, width per lane — placeholder ranges)
Clock and reset domains (PHY-side vs upper-layer)
Init/training sequence requirements (state-machine sketch only, no timing numbers)
Error reporting (BER reporting hook for Section 12.4 verification)
Behavioral-PHY simulation contract (how PopLinkPHY_Behavioral.scala must satisfy this interface)
Open questions (lane count, target Gb/s — defer to PHY options survey results)

Acceptance criteria

docs/spec/poplink-phy-if.md exists with the sections above
Status: Draft skeleton + Owner: TBD header
Each section has TODO markers and short intent description
Bundle-signal table has placeholder rows (no fabricated widths/timings)
Cross-references PopLinkPHY_Behavioral.scala skeleton issue and the existing PHY options survey issue
No commitments on lane count or Gb/s — those depend on PHY option selection
References PLAN.md Sections 13.3, 13.4, 12.4 explicitly

Plan refs

Section 13.3 (PopLinkPHYIO bundle), Section 13.4 (Phase 1 PHY deliverable #2), Section 12.4 (BER verification expectations)

Notes

Spec scaffold only — actual widths, lane counts, and timing close depend on PHY option selection (academic vs commercial IP). Keep skeleton vendor-neutral. The behavioral RTL implementation and the research report are tracked separately.

## Goal Create the PopLink PHY interface spec skeleton at `docs/spec/poplink-phy-if.md`, listed as Phase 1 PHY deliverable #2 in PLAN.md Section 13.4. The spec describes the `PopLinkPHYIO` Chisel bundle contract that decouples upper-layer fabric logic from the analog PHY implementation (academic open vs commercial IP vs partnership). Sections to include: - Purpose and scope (decouple PHY from upper layers per Section 13.3) - Bundle signals (TODO table: tx_data, rx_data, tx_valid, rx_valid, lane_status, reset/init handshake, error flags, calibration controls) - Lane configuration (number of lanes, width per lane — placeholder ranges) - Clock and reset domains (PHY-side vs upper-layer) - Init/training sequence requirements (state-machine sketch only, no timing numbers) - Error reporting (BER reporting hook for Section 12.4 verification) - Behavioral-PHY simulation contract (how `PopLinkPHY_Behavioral.scala` must satisfy this interface) - Open questions (lane count, target Gb/s — defer to PHY options survey results) ## Acceptance criteria - [ ] `docs/spec/poplink-phy-if.md` exists with the sections above - [ ] `Status: Draft skeleton` + `Owner: TBD` header - [ ] Each section has `TODO` markers and short intent description - [ ] Bundle-signal table has placeholder rows (no fabricated widths/timings) - [ ] Cross-references `PopLinkPHY_Behavioral.scala` skeleton issue and the existing PHY options survey issue - [ ] No commitments on lane count or Gb/s — those depend on PHY option selection - [ ] References PLAN.md Sections 13.3, 13.4, 12.4 explicitly ## Plan refs Section 13.3 (PopLinkPHYIO bundle), Section 13.4 (Phase 1 PHY deliverable #2), Section 12.4 (BER verification expectations) ## Notes Spec scaffold only — actual widths, lane counts, and timing close depend on PHY option selection (academic vs commercial IP). Keep skeleton vendor-neutral. The behavioral RTL implementation and the research report are tracked separately.