rtl(PopRoCCRouter): chisel skeleton + chiseltest elaborate-only spec #63

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navigator merged 1 commit from auto/issue-48-20260525T195031Z_issue48 into main 2026-05-25 17:02:03 -03:00
Owner

Closes #48.

What

Skeleton for PopRoCCRouter so that PLAN.md §12.3 step 1 (module elaborates) and step 2 (chiseltest harness exists) are satisfied without lifting the SPEC out of stub state.

  • rtl/src/pop/PopRoCCRouter.scalapackage chipyard.pop, empty IO bundle, every Interface facet annotated // TBD per SPEC §<section>. SPDX-License-Identifier: CHARRUA-1.2.
  • rtl/tests/PopRoCCRouter/PopRoCCRouterSpec.scalaAnyFlatSpec + ChiselScalatestTester with a single should "elaborate" test. SPDX-License-Identifier: AGPL-3.0-or-later.

Why

The SPEC at rtl/src/pop/specs/PopRoCCRouter.SPEC.md is still Stub — every Interface field is TBD. Per issue #48 acceptance criteria the skeleton must elaborate without fabricating widths, timing or tile counts. The IO bundle is therefore empty, with TBD comments pointing back at each SPEC section. Concrete ports, behaviour, golden model and coverage land in follow-up issues once the SPEC is promoted.

Verification

Dropped both files into ~/chipyard/generators/chipyard/src/{main,test}/scala/pop/ and ran against Chipyard 1.13.0 (commit 69eba86, sbt 1.12.11):

  • sbt "project chipyard; compile" — green (70 s)
  • sbt "project chipyard; Test/compile" — green (57 s, the PopRoCCRouterSpec file is among the 2 sources compiled)

The temp copies were removed. No build.sbt is introduced in this repo; CI's sbt-compile job remains in its current "skipped until build.sbt lands" state (see .forgejo/workflows/build.yml).

ADR / Plan refs

  • PLAN.md §8.2 (custom module list)
  • PLAN.md §12.3 (per-module verification floor)
  • SPEC at rtl/src/pop/specs/PopRoCCRouter.SPEC.md (left untouched)

Out of scope

  • Lifting SPEC from Stub
  • Any Bundle field with a concrete width, timing or tile count
  • Functional tests, golden model, coverage report
Closes #48. ## What Skeleton for `PopRoCCRouter` so that PLAN.md §12.3 step 1 (module elaborates) and step 2 (chiseltest harness exists) are satisfied without lifting the SPEC out of stub state. - `rtl/src/pop/PopRoCCRouter.scala` — `package chipyard.pop`, empty IO bundle, every Interface facet annotated `// TBD per SPEC §<section>`. `SPDX-License-Identifier: CHARRUA-1.2`. - `rtl/tests/PopRoCCRouter/PopRoCCRouterSpec.scala` — `AnyFlatSpec` + `ChiselScalatestTester` with a single `should "elaborate"` test. `SPDX-License-Identifier: AGPL-3.0-or-later`. ## Why The SPEC at `rtl/src/pop/specs/PopRoCCRouter.SPEC.md` is still **Stub** — every Interface field is `TBD`. Per issue #48 acceptance criteria the skeleton must elaborate without fabricating widths, timing or tile counts. The IO bundle is therefore empty, with TBD comments pointing back at each SPEC section. Concrete ports, behaviour, golden model and coverage land in follow-up issues once the SPEC is promoted. ## Verification Dropped both files into `~/chipyard/generators/chipyard/src/{main,test}/scala/pop/` and ran against Chipyard 1.13.0 (commit `69eba86`, sbt 1.12.11): - `sbt "project chipyard; compile"` — green (70 s) - `sbt "project chipyard; Test/compile"` — green (57 s, the `PopRoCCRouterSpec` file is among the 2 sources compiled) The temp copies were removed. No `build.sbt` is introduced in this repo; CI's sbt-compile job remains in its current "skipped until build.sbt lands" state (see `.forgejo/workflows/build.yml`). ## ADR / Plan refs - PLAN.md §8.2 (custom module list) - PLAN.md §12.3 (per-module verification floor) - SPEC at `rtl/src/pop/specs/PopRoCCRouter.SPEC.md` (left untouched) ## Out of scope - Lifting SPEC from Stub - Any Bundle field with a concrete width, timing or tile count - Functional tests, golden model, coverage report
rtl(PopRoCCRouter): chisel skeleton + chiseltest elaborate-only spec
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0fc35b592d
Closes #48.

Adds the buildable scaffold required by PLAN.md §12.3 step 1 (module
elaborates) and step 2 (chiseltest harness exists) for PopRoCCRouter,
without lifting the SPEC out of stub state.

* rtl/src/pop/PopRoCCRouter.scala — package chipyard.pop, empty IO
  bundle, every Interface field annotated `// TBD per SPEC §<section>`.
  CHARRUA-1.2 header. No widths, timing or tile counts invented.
* rtl/tests/PopRoCCRouter/PopRoCCRouterSpec.scala — AnyFlatSpec +
  ChiselScalatestTester with a single `should "elaborate"` test.
  AGPL-3.0-or-later header.

Verified by dropping both files into ~/chipyard/generators/chipyard/src/
{main,test}/scala/pop/ and running `sbt "project chipyard; compile"`
and `sbt "project chipyard; Test/compile"` against Chipyard 1.13.0
(commit 69eba86, sbt 1.12.11) — both green. Behaviour, golden model
and coverage land in follow-up issues once the SPEC is filled in.
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CI green (head 0fc35b592d), auto-approving

CI green (head 0fc35b592d16629ea488b7499348843d0a29f311), auto-approving
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